FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems

Citation

Mohammady, Somayeh and Mohd Sidek, Roslina and Varahram, Pooria and Hamidon, Mohd Nizar and Sulaiman, Nasri (2011) FPGA implementation of the proposed DSI-SLM scheme for PAPR reduction in OFDM systems. In: 17th Asia-Pacific Conference on Communications (APCC 2011), 2-5 Oct. 2011, Sutera Harbour Resort, Kota Kinabalu, Sabah, Malaysia. (pp. 484-487).

Abstract

High peak to average power ratio (PAPR) is the main drawback of orthogonal frequency division multiplexing (OFDM) systems. Some of the proposed PAPR reduction solutions are dummy insertion (DSI), selected mapping (SLM) and combined DSI-SLM scheme. This paper presents FPGA implementation of DSI-SLM scheme for OFDM signals. The results of the implementation and simulation are compared which show that the PAPR is almost the same as simulation results. The hardware resource consumption of the DSI-SLM method is estimated to be at least 4 times less than conventional SLM (C-SLM) method with comparable PAPR performance.

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Additional Metadata

Item Type:	Conference or Workshop Item (Paper)
Divisions:	Faculty of Engineering
DOI Number:	https://doi.org/10.1109/APCC.2011.6152857
Publisher:	IEEE
Keywords:	C-SLM; DSI; Hardware consumption; IFFT; Transmission efficiency; WiMAX
Depositing User:	Nabilah Mustapa
Date Deposited:	10 May 2019 08:28
Last Modified:	10 May 2019 08:28
Altmetrics:	http://www.altmetric.com/details.php?domain=psasir.upm.edu.my&doi=10.1109/APCC.2011.6152857
URI:	http://psasir.upm.edu.my/id/eprint/68248
Statistic Details:	View Download Statistic

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