UPM Institutional Repository

Modelling and Simulation of Si/SiGe Heterostructure Devices


Citation

Abd. Rasheid, Norulhuda (2002) Modelling and Simulation of Si/SiGe Heterostructure Devices. Masters thesis, Universiti Putra Malaysia.

Abstract

Complementary metal-oxide-semiconductor (CMOS) is currently the most dominant technology used in making integrated systems. It consists of both n-channel MOS transistor (NMOS) and p-channel MOS transistor (PMOS) fabricated on the same substrate. Conventionally, the substrate is made of silicon. Alternatively, the substrate can be made from different layer of semiconductors known as heterostructure. Much attention has been given to SilSiGe due to its compatibility with silicon and the higher carrier mobilities. SiGe is an alloy which is said to be an alternative solution to the problem of a down-scaled CMOS to produce high speed device. This work consists of modelling three different of SilSiGe heterostructure substrates which are used to construct n- and p-channel MOSFETs and later to construct CMOS inverter. The three types of heterostructures are a strained SiGe on silicon substrate, a strained silicon on relaxed SiGe/Si substrate and a strained SiGe on strained Silrelaxed layers of SiGe/Si substrate. A device simulator, Avanti MEDICI Version 1999.2 is used in this project. Although it has heterojunction capability, it does not support model for a strained Si. This work also highlights the method to simulate SilSiGe heterostructures containing strained layer using MEDICI. Simulations on the band structure and current-voltage (I-V) characteristics of the MOSFETs are carried out. The I-V g and I-V d are simulated for different value of Ge% and mobility. This is to observe the effect of varying the value of Ge% and mobility used in the design. The simulation on the CMOS inverter as the fundamental circuit is carried out to obtain the transfer curve. The noise margin and switching characteristics can be extracted from the transfer curve. All the simulated results are then compared with the Si bulk. The analyses show that the performance of the SilSiGe heterostructures is better in terms of the electrical characteristics of the MOSFETs and the switching characteristics of the CMOS inverter, as compared to the performance of the Si bulk.


Download File

[img] Text
FK_2002_16.pdf

Download (1MB)

Additional Metadata

Item Type: Thesis (Masters)
Subject: Heterostructures
Subject: Metal oxide semiconductors
Call Number: FK 2002 16
Chairman Supervisor: Roslina bt Mohd Sidek, PhD
Divisions: Faculty of Engineering
Depositing User: Laila Azwa Ramli
Date Deposited: 06 May 2011 06:42
Last Modified: 30 Apr 2024 01:00
URI: http://psasir.upm.edu.my/id/eprint/10622
Statistic Details: View Download Statistic

Actions (login required)

View Item View Item