3-level automotive safety warning and alert system using FPGA

Citation

Yeoh, Yoeng Jye and Jaafar, Haslina and Wan Hasan, Wan Zuha (2015) 3-level automotive safety warning and alert system using FPGA. In: 2015 IEEE International Circuits and Systems Symposium (ICSyS 2015), 2-4 Sept. 2015, Holiday Villa Beach Resort & Spa, Langkawi, Kedah. (pp. 125-129).

Abstract

This paper presents a safety warning system on automotive with 3 warning level according to conditions. The system is designed based on the Lane Departure Warning (LDW) system. This system is expected to reduce or minimize the road accident happened due to risky and careless driving. In the system, several sensors are embedded such as sonar wave sensors and camera. The system is designed using FPGA DE1 board as the design currently is in prototype stage. Several interface such as LCD, LED, and seven segment display are used. The maximum response time is about 3ms, and for longer range detection of sonar wave sensor, the longer the time required. Thus, the blind spot detection module and the camera module are independent, to improve the response time of the system, even though the warning alarm gives are dependent on each other.

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Additional Metadata

Item Type:	Conference or Workshop Item (Paper)
Divisions:	Faculty of Engineering
DOI Number:	https://doi.org/10.1109/CircuitsAndSystems.2015.7394078
Publisher:	IEEE
Keywords:	Automotive safety system; FPGA design; Lane Departure Warning (LDW) system
Depositing User:	Nabilah Mustapa
Date Deposited:	07 Jun 2017 04:52
Last Modified:	07 Jun 2017 04:52
Altmetrics:	http://www.altmetric.com/details.php?domain=psasir.upm.edu.my&doi=10.1109/CircuitsAndSystems.2015.7394078
URI:	http://psasir.upm.edu.my/id/eprint/55640
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