Dual sampling sigma delta analog to digital converter

An analog to digital converter (ADC) (100), includes, a sigma delta modulator (102) including a modulator input configured for receiving an analog input signal (104), and a modulator output configured for providing multiple digital signals (105, 107). The ADC further includes a clock (106) operating at a conversion clock frequency for producing a clock signal (108), and a decimator (110) for processing the multiple digital signals produced by the sigma delta modulator (102) and generating an output digital signal (150), and the decimator (110) includes multiple decimation elements (112, 114) and a combining element (116) for generating the output digital signal (150) with N-bits. The sigma delta modulator (102) further includes a comparator (118) having a first input (120) for receiving the analog input signal (104), a second input (121) for receiving an analog estimate of the analog input signal (104), and a comparator output (122).

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