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ALU Circuit Design Mix Logic Styles Technique


Lee, Seng Siong (2004) ALU Circuit Design Mix Logic Styles Technique. Masters thesis, Universiti Putra Malaysia.


Arithmetic Logic Unit (ALU) is the heart of microprocessor. It is basically a combinational circuit that performs a number of arithmetic and logic functions. Hence, its performance is crucial for the design of high performance digital computer system.For the past two decades, Complementary Metal Oxide Semiconductor (CMOS) has been the dominant logic style in digital logic design. Its success is mainly contributed by the low power dissipation, compact design, adequately high speed, simple circuitry and robustness against transistor and voltage scaling properties.However, the advancement of digital computer technology has requires higher circuit speed. Thus, alternative logic styles need to be found. Complementary Pass-transistor Logic (CPL) proved to be a viable alternative to CMOS logic. Its strength lies in the absence of slow PMOS transistors in the logic path, low input capacitance and higher speed.A performance comparison had been made between CMOS and CPL logic styles. Logic units and arithmetic units had been designed and compared of their performance in circuit delay, power dissipation and circuit size. Measurement results had showed that CMOS is dominant in simple monotonic logic gates, while CPL performs better for more complex circuit such as multiplexer and arithmetic units. 4-bits ALU is design using full CMOS logic style and also mix logic styles (using the best of both CMOS and CPL). Mix logic styles 4-bits ALU has 76% less power dissipation compared to full CMOS implementation 4-bits ALU. It also has higher speed than full CMOS design but with some marginal increase in circuit size. Hence, mix logic styles has proved to be a viable alternative to full CMOS design for high performance ALU and other digital logic designs.

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Additional Metadata

Item Type: Thesis (Masters)
Subject: Circuit training
Subject: Logic circuits
Call Number: FK 2004 11
Chairman Supervisor: Rahman Bin Wagiran
Divisions: Faculty of Engineering
Depositing User: Users 12 not found.
Date Deposited: 23 May 2008 19:57
Last Modified: 27 May 2013 06:46
URI: http://psasir.upm.edu.my/id/eprint/168
Statistic Details: View Download Statistic

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