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Power Amplifiers Linearization Based On Complex Gain Memory Predistortion


Varahram, Pooria (2010) Power Amplifiers Linearization Based On Complex Gain Memory Predistortion. PhD thesis, Universiti Putra Malaysia.


Power Amplifiers (PAs) are important components in communication systems and are nonlinear. The nonlinearity creates out of band distortion beyond the signal bandwidth, which interferes with adjacent channels. It also causes distortions within the signal bandwidth, which decreases the bit error rate at the receiver. Digital predistortion is one of the most cost effective ways among all linearization techniques to compensate for these nonlinearities. In this thesis a novel technique for compensating memory effects and out of band distortions is proposed and is called Complex Gain Memory Predistortion (CGMP). The main advantage of the CGMP technique as compared to the memory polynomial technique is the ability of this technique to compensate all the memory effects inside the PA. Two structures of the CGMP technique are proposed. The CGMP technique is examined using two approaches, simulation and experiment. Power amplifiers are modeled with memory polynomial technique to examine the effects of the memory that causes increment in Adjacent Channel Leakage Ratio (ACLR). To implement this method, the complex divider is required. This complex divider is then designed and implemented in Field Programmable Gate Array (FPGA) and combined with other parts to make the predistortion block. The CGMP is implemented in Virtex 5 FPGA and simulated using Xilinx blocks in Matlab. In the experimental approach the CGMP is examined with the actual power amplifier ZVE-8G from Mini Circuit. Finally the CGMP technique is compared with memory polynomial method and validated using a 1.9 GHz 60W LDMOS power amplifier that is designed in simulation and various signals such as 2-carrier WCDMA with 10 MHz carrier spacing and Mobile WiMAX with 10 MHz bandwidth. The simulations results showed between 25 to 30 dB improvement in ACLR and almost 5 dB improvement as compared to the memory polynomial method. The experimental results also show around 10 dB reduction in ACLR with applying QPSK signal with 1 MHz bandwidth. The improvement of 7 percent in Power Added Efficiency (PAE) is also achieved.

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Additional Metadata

Item Type: Thesis (PhD)
Subject: Amplifier (Electronics)
Subject: Digital control systems
Call Number: FK 2010 4
Chairman Supervisor: Mohd Nizar B. Hamidon, PhD
Divisions: Faculty of Engineering
Depositing User: Mohd Nezeri Mohamad
Date Deposited: 13 Jul 2011 07:58
Last Modified: 06 Sep 2011 08:15
URI: http://psasir.upm.edu.my/id/eprint/12260
Statistic Details: View Download Statistic

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