Spiking neural network with 1T-1R RRAM synapses and CMOS LIF neurons for in-situ learning and pattern recognition

The neuromorphic computation has gained attention over traditional computing techniques due to its low power consumption, real-time processing and adaptability. The spiking neural networks (SNN) are event-based which process information as spikes to provide high energy efficiency and fast computation. In this article, a novel SNN with CMOS neuron and resistive random access memory (RRAM) synapses is implemented for pattern recognition. The RRAM synapses exhibit synaptic plasticity suitable for in-memory computations. A computationally efficient CMOS based leaky integrate and fire (LIF) neuron model is implemented to handle the data-driven applications effectively. The SNN contains the forward and feedback mode operation. In the forward mode, the input pre-spikes with ON-bit and OFF-bit frequencies corresponding to the binary pixel intensities of the image are applied to the RRAM synaptic array. The CMOS LIF neuron integrate these spikes from synapses and produce the post-spikes. In the feedback mode, these post-spikes are given to the sense line and the synaptic weights get modified using spike time-dependent plasticity (STDP) learning mechanism. The proposed SNN circuit is used for training and recognizing the alphabets/digits in 500μs using 25 1T-1R RRAM synapses and a single output CMOS LIF neuron.

Text 122273.pdf - Published Version Restricted to Repository staff only Download (4MB) Official URL or Download Paper: https://linkinghub.elsevier.com/retrieve/pii/S1434...

Actions (login required)

View Item