Citation
Abstract
Network-on-Chips (NoCs) serve as essential interconnection infrastructures in Multi-processor System-on-Chip (MPSoC) designs, emphasizing ƒexibility, extensibility, and low power consumption. The effectiveness of communication within NoCs relies heavily on the routing algorithm employed. However, the routing process faces signi‚cant challenges, such as deadlock, livelock, congestion, and faults, which impact the Design Space Exploration (DSE) process. In this research, we propose a prediction model-based ANN with a Metaheuristic Optimization approach for predicting the utilized routing algorithm by the NoC-based MPSoC platform during the DSE in order to reduce the time required to specify the NoC-based MPSoC platform con‚gurations. The main idea of the proposed method is to develop a prediction model, speci‚cally an Arti‚cial Neural Network (ANN) optimized using the Guaranteed Convergence Arithmetic Optimization Algorithm (GCAOA-ANN), for predicting the utilized routing algorithm in NoC-based MPSoC platform during the DSE process. The methodology consists of two phases. Firstly, an automated strategy is proposed to execute and control the NOXIM simulator, enabling the simulation and collection of NoC-based MPSoC scenarios under different constraints, rules of NoC design (including routing protocols), and performance metrics. Consequently, NoC traf‚c data is gathered. Secondly, building upon the work of previous researchers, who have suggested the development of hybrid models to improve accuracy, this research introduces a novel methodology incorporating an ANN optimized using the GCAOA-ANN to predict the routing algorithm employed by the NoC-based MPSoC. The hybrid GCAOA-ANN model demonstrated superior performance compared to other models, including PSOGW-ANN, SMA-ANN, AOA-ANN, Random Forest, and ANN. Where the learning rate and the number of nodes in the ‚rst and second hidden layers were: (0.0023, 1, 20) for the GCAOA-ANN model. In addition, the evaluation metrics of the GCAOA-ANN model showed excellent results, with an R2 value of (99.80), an RMSE of (0.0000135 m3/s), an MSE of (0.0000118 m3/s), an SI of (0.000077), an MBE of (0.0000028), and a MAR of (0.000187616 m3/s). The outcomes of this research are anticipated to offer a guide for individuals interested in conducting research on On-Chip communication routing protocols and DSE in NoC-based MPSoCs in the context of IoT using ML approaches, while the GCAOA-ANN has the potential to generalize to new problems.
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Official URL or Download Paper: https://ieeexplore.ieee.org/document/10220082/
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Additional Metadata
Item Type: | Article |
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Divisions: | Faculty of Computer Science and Information Technology Faculty of Engineering |
DOI Number: | https://doi.org/10.1109/access.2023.3305669 |
Publisher: | Institute of Electrical and Electronics Engineers |
Keywords: | Network-on-chip; MPSoC; Routing algorithms; GCAOA-ANN; Guaranteed convergence arithmetic optimization algorithm |
Depositing User: | Ms. Nur Aina Ahmad Mustafa |
Date Deposited: | 28 Oct 2024 01:32 |
Last Modified: | 28 Oct 2024 01:32 |
Altmetrics: | http://www.altmetric.com/details.php?domain=psasir.upm.edu.my&doi=10.1109/access.2023.3305669 |
URI: | http://psasir.upm.edu.my/id/eprint/107703 |
Statistic Details: | View Download Statistic |
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