UPM Institutional Repository

Real time plate recognition for motorcycle using field programmable gate array


Citation

Mat Nong, Mohd Ali (2019) Real time plate recognition for motorcycle using field programmable gate array. Masters thesis, Universiti Putra Malaysia.

Abstract

The aim of this project is to develop motorcycle plate image detection and recognition framework for traffic offender using Field Programmable Gate Array (FPGA). The proposed system has processing time of 33.3 milliseconds in various critical conditions, such as daylight, rainy daylight and night. Currently, the available technology is lacking due to the system implementation is not robust and less efficient. Benchmarking study for fast processing system showed FPGA can carry out real-time processing at 128 × 128 resolution video sequences at 30 frames per second (fps). Therefore FPGA was selected to improve the plate number recognition for motorcycle. Comparison between hardware (FPGA) and software (MATLAB) implementation of edge detection was also performed. Currently, the time for processing motorcycle plate image using software is 52 milliseconds. To meet the processing time constraints for the developed framework, it is important to quantify the reduction of processing time that can be achieved if the framework component are embedded into hardware-based platform such as FPGA. MATLAB-Simulink was selected for designing the detection system. This system was designed to detect static images and moving objects in critical condition from 5 to 15 meters distances. Then, the detection system was implemented on the FPGA for the detection and recognition process. The output image was analyzed by comparing the accuracy of bounding box and edges displayed in different conditions, threshold levels, resolutions and distances. From this proposed system, the daylight condition at 5 meter distance gives the highest accuracy of 99% at threshold level ranging from 2 – 10. In addition, the highest resolutions accuracy is 99% at 1024 ×768 pixels. This comparable with the output from Matlab Simulink system that shows the best accuracy of 99% at threshold level 2 and resolution pixel 1024 ×768 pixels. The second best conditions is rainy daylight, in which the threshold accuracy is 99% at level 10 with 99% resolution accuracy at 1024 ×768 pixels. From the analysis, it can be concluded that daylight is the best condition in detecting the motorcycle images, followed by rainy daylight and night conditions. The speed to process the image is 30 frames per second, which is 58 % faster than images processed by Matlab Simulink. Thus, this proposed system on FPGA is more flexible, efficient and robust for real time plate recognition for motorcycle. This study can be implemented to efficiently identify road traffic offenders and improve visual driver support system in the future.


Download File

[img] Text
ITMA 2020 13 IR.pdf

Download (1MB)

Additional Metadata

Item Type: Thesis (Masters)
Subject: Gate array circuits
Subject: Programmable array logic
Call Number: ITMA 2020 13
Chairman Supervisor: Roslina binti Mohd Sidek, PhD
Divisions: Institute of Advanced Technology
Depositing User: Ms. Rohana Alias
Date Deposited: 03 Apr 2023 06:25
Last Modified: 03 Apr 2023 06:25
URI: http://psasir.upm.edu.my/id/eprint/99237
Statistic Details: View Download Statistic

Actions (login required)

View Item View Item