Sneak path current tolerant resistive crossbar array structures based on self-rectifying memristor model for memory applications

The demands for continuous miniaturization of electronic devices and circuits have kept on increasing to fulfill consumer needs. However, today’s conventional technologies are facing major challenges related to scaling and design issues. Nanoscale memristive devices are one of the promising futuristic technologies that are compatible with CMOS process and fit several potential applications. Inspired by its non-volatility feature, the memristor is used as a memory cell in crossbar array structures. Despite their high density and less complexity, memristive crossbar memory arrays face a major problem related to the sneak current flowing through the pathways of the unselected memory cells. This is referred as sneak path current problem that causes faulty memory read and write operations and ultimately limits the memory size. The aim of this thesis is to present a method to alleviate the sneak path current based on modified crossbar structures with self-rectifying memristive devices. On one hand, memristors featuring self-rectification characteristic would suppress the sneak current when reverse biased. Whereas modifying the structure of crossbar array by introducing insulating crosspoints would further enhance the system performance To achieve the thesis objectives, a unique self-rectifying memristor model is proposed. The proposed model is developed according to the behavior of the self-rectifying memristors and it is adequately adaptive to fit different experimental data and other memristor models. Subsequently, a devicelevel memristor model is implemented in Verilog-A and embedded as a memory cell in five different crossbar structures. Circuit-level memristive crossbar arrays are developed and simulated using Cadence Virtuoso. Defining a set of figures of merit in relation to the sneak current problem, the performance of the memristive crossbar arrays is evaluated while considering worst case read and write scenarios with different parameter variations. Thesis results show that the proposed memristor model properly describes the self-rectification behavior of a-Si memristors and can be used by leading circuit simulators for testing memristor applications. In addition, the results prove the concept of using self-rectifying memristors as memory device that can intrinsically suppress the sneak path current in selector-less memristive crossbar arrays. The results of the proposed SRM-based column and row array structure summarized as follows; during read operation, the maximum achievable normalized voltage margin is 97.94% for grounded terminals scheme and the minimum consumed power is 62.2nW for floating terminals scheme. During write operation, the minimum word line current is 7.61pA for floating terminals scheme while the minimum consumed power is 15.2pW.

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