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Reconfigurable enhanced path metric updater unit for Space Time Trellis Code Viterbi decoder


Abu, Mohd Azlan and Harun, Harlisya and Harmin, Mohammad Yazdi and Abdul Wahab, Noor Izzri and Rahmat, Mohd Khairil and Abd Hamid, Mohd Fairuz and Ramli, Aizat Faiz (2017) Reconfigurable enhanced path metric updater unit for Space Time Trellis Code Viterbi decoder. Journal of Telecommunication, Electronic and Computer Engineering, 9 (2-7). 49 - 53. ISSN 2180-1843; ESSN: 2289-8131


Space Time Trellis Code (STTC) encoding and decoding techniques are effective for delivery of a reliable information because of the signal to noise ratio is very small. Even though the Viterbi algorithm is complicated to be designed, these methods typically used large memory space to store the information that have been processed mainly at the Path Metric Updater (PMU). Therefore, an effective memory management technique is one of the key factors in designing the STTC Viterbi decoder for low power consumption applications. This paper proposed the PMU memory reduction technique especially on Traceback activities that usually required a lot of memories for storing the data that has been processed in the past part by using Altera Quartus 2 and 0.18 µm Altera CPLD 5M570ZF256C5 as targeted hardware. Through this method, the reduction achieved at least 66% of memory requirements and 75% improvements in processing time without a significant effects on the outputs results of the STTC Viterbi Decoder for 4-PSK modulation technique by using 50MHz clocks.

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Official URL or Download Paper: https://jtec.utem.edu.my/jtec/article/view/2591

Additional Metadata

Item Type: Article
Divisions: Faculty of Engineering
Publisher: Penerbit Universiti Teknikal Malaysia Melaka
Keywords: Space Time Trellis Code; Viterbi decoder; Register transfer level
Depositing User: Mas Norain Hashim
Date Deposited: 25 Nov 2022 01:34
Last Modified: 25 Nov 2022 01:34
URI: http://psasir.upm.edu.my/id/eprint/62922
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