Timing generator for 120fps CMOS image sensors on 0.13 μm CMOS technology

Image clarity is an important criterion in digital imaging. However, typical rolling shutter type complementary metal-oxide semiconductor (CMOS) image sensors with frame rate of 30fps which is used for relatively slow speed image capture suffers from image blur phenomena when capturing the fast-moving objects. Therefore, an integrating chip control circuit is needed for a high frame rate shift registers structure readout control circuit to overcome the image blur phenomena suffered by rolling shutter readout scheme. In this paper, a timing generator acts as the control circuit for 120fps CMOS image sensors on 0.13μm CMOS technology is developed. The design is modeled and analyzed using ModelSim for FPGA verification and post layout validation is successfully demonstrated with Synopsys EDA tool. The on-chip timing generator design block results in total power consumption of 4.0733μW and total design area of 61.64 χ 60.64 μm2.

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