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Greedyzero-based scheduling algorithm to route in optical low stage interconnection networks


Moudi, Mehrnaz (2012) Greedyzero-based scheduling algorithm to route in optical low stage interconnection networks. Masters thesis, Universiti Putra Malaysia.


A class of dynamic interconnection networks is Multistage Interconnection Networks (MINs) that is popular in switching and communication applications. In recent years, MINs have assumed important because of their cost- effectiveness. The advances in electro-optic technologies have made significant improvement in the optical technology. The idea of optical implementation of MINs meet the ever increasing demands of high performance computing communication applications for high channel bandwidth, low communication latency and parallel processing. Optical Multistage Interconnection Network (OMIN) is very popular in switching, large transmission capacity, and communication among other types of interconnection networks. OMINs present crosstalk that related with optical switches, as a result of undesired coupling two signals within each switching element. Therefore, it is not possible to route more than one message at the same time, without any crosstalk, over a switching element in an OMIN. This thesis is focused on an efficient solution to avoid crosstalk, which is routing traffic through an optical network to avoid coupling two signals within each switching element. Under the constraint of avoiding crosstalk, what we have been interested is how to realize a permutation that will use the minimum number of passes, the minimum execution time and the maximum bandwidth to route the input request to output without crosstalk. Many algorithms have been designed to perform the routing better. This research contains two approaches to improve the performance of networks to solve the problem. First, the new architecture of Interconnection Network (Low Stage reduce number of switches and decrease execution time considerably while modifying bandwidth and number of passes via the same low stage transformation is negligible. Then the GreedyZero algorithm is developed to minimize the number of passes approximately 30% in compare with Zero algorithm to route all the inputs to outputs without any crosstalk. The GreedyZero algorithm has been presented in the Low Stage Interconnection Network. This algorithm has been developed to achieve performance goals in terms of 50% reduction in the number of passes.

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Additional Metadata

Item Type: Thesis (Masters)
Subject: Computer networks
Subject: Computer algorithms
Call Number: FSKTM 2012 15
Chairman Supervisor: Professor Mohamed Othman, PhD
Divisions: Faculty of Computer Science and Information Technology
Depositing User: Haridan Mohd Jais
Date Deposited: 11 Aug 2015 04:26
Last Modified: 11 Aug 2015 04:26
URI: http://psasir.upm.edu.my/id/eprint/39772
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