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Synchronization in coupled Ikeda delay system


Valli, D. and Muthuswamy, Bharathwaj and Banerjee, Santo and Kamel Ariffin, Muhammad Rezal and Abdul Wahab, Ainuddin Wahid and Kaliyaperumal, Ganesan and Subramaniam, Chittur Krishnaswamy and Kurths, Juergen (2014) Synchronization in coupled Ikeda delay system. The European Physical Journal Special Topics, 223 (8). pp. 1465-1479. ISSN 1951-6355; ESSN: 1951-6401


In this work, we demonstrate the use of a Field Programmable Gate Array (FPGA) as a physical platform for realizing chaotic delay differential equations (DDE). Moreover, using our platform, we also experimentally study the synchronization between two time delayed systems. We illustrate two different experimental approaches – one is hardware co-simulation (using a Digilent Atlys with a Xilinx Spartan-6 FPGA) and the other is analog output (using a Terasic DE2-115 with an Altera Cyclone IV E FPGA).

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Additional Metadata

Item Type: Article
Divisions: Faculty of Science
Institute for Mathematical Research
DOI Number: https://doi.org/10.1140/epjst/e2014-02144-8
Publisher: Springer
Notes: Topical collection: Chaos, Cryptography and Communications
Keywords: Synchronization; Ikeda delay system
Depositing User: Nurul Ainie Mokhtar
Date Deposited: 14 Jan 2016 05:00
Last Modified: 14 Jan 2016 05:00
Altmetrics: http://www.altmetric.com/details.php?domain=psasir.upm.edu.my&doi=10.1140/epjst/e2014-02144-8
URI: http://psasir.upm.edu.my/id/eprint/35559
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