Mahdiraji, Ghafour Amouzad and Abdullah, Mohamad Khazani and Mokhtar, Makhfudzah and Mohammadi, Amin Malek and Abas, Ahmad Fauzi and Mohd Basir, Safuraa and Raja Abdullah, Raja Syamsul Azmir (2010) 70-Gb/s amplitude-shift-keyed system with 10-GHz clock recovery circuit using duty cycle division multiplexing. Photonic Network Communications, 19 (3). pp. 233-239. ISSN 1387-974X
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The performance of ASK over DCDM for up to seven channels is reported. The aggregate bit rate of 70 Gb/s is achieved with only 160-GHz modulation bandwidth. The clock and data recovery are realized at 10-GHz clock rate, which is very economic and efficient. At 7 × 10 Gb/s, the worst receiver sensitivity of−10 dBm, OSNR of 41.5 dB and chromatic dispersion tolerance of ±17 ps/nm are achieved. Whereas, for the best channel, the receiver sensitivity,OSNR, and chromatic dispersion tolerance are −23.5dBm, 29dB, and ±36 ps/nm, respectively.
|Keyword:||Optical communications, Multiplexing, Duty cycle|
|Faculty or Institute:||Faculty of Engineering|
|Deposited By:||Anas Yahaya|
|Deposited On:||31 Mar 2011 10:22|
|Last Modified:||31 Mar 2011 10:29|
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